1. Field of the Disclosure
The present disclosure relates generally to a parallel combined output linear amplifier and operating method thereof, and more particularly, to a parallel combined output linear amplifier having a wide load drive range and a wide dynamic range and operating method thereof.
2. Description of the Related Art
In a wireless communication system, a power amplifier (PA) is used for amplifying a signal before the signal is transmitted through an antenna. Typical characteristics of a PA include a gain and power efficiency.
The gain of the PA is a performance criterion that increases an output signal from an input signal. It is important for a PA to maintain constant performance while an input value or a frequency changes.
The power efficiency of a PA relates to supply power by which the PA is operated. Specially, for a small electronic device with a limited battery capacity, it is very important to effectively manage the supply power of the PA.
A typical PA, which is used at a radio frequency (RF) terminal of a terminal for a wireless mobile communication, uses a battery of the terminal as supply power. As a peak to average power ratio (PAPR) of an input signal increases, the efficiency of an RF PA decreases. An input signal with a high PAPR requires a 1 dB gain compression point (P1 dB) and saturated power for an RF PA. Thus, a typical RF PA, which is operated by fixed supply power, has low power efficiency at both of a peak power range and a back-off power range.
In an attempt to prevent low power efficiency at the back-off power range, technology has been developed that adjusts a supply power of an RF PA while tracking an average power of an input signal. Specially, an envelope tracking (ET) technology improves a power efficiency characteristic of the RF PA by adjusting the supply power of the RF PA while tracking an envelope signal of an input signal. A key device of an ET PA is a supply modulator (SM) for regulating battery power into an envelope signal. The SM has a hybrid structure that includes a linear regulator and a switching regulator for satisfying high bandwidth and high efficiency. An analog output amplifier, which is used in a linear regulator for ET power amplification, requires specifications for efficiency, speed, bandwidth, dynamic range, a linear characteristic, load drive capacity, and the like.
In an analog output amplifier, which is used in a wireless mobile communication terminal, a design criterion such as, for example, efficiency, speed, bandwidth, dynamic range, a linear characteristic, load drive capacity, and the like, requires a high target value. However, in a complementary metal-oxide-semiconductor (CMOS) process, which is generally used as a process of an analog circuit, a parasitic capacitance exists that is proportional to a size of a circuit. A parasitic capacitance for a large MOS field-effect transistor (MOSFET), which is used for driving a large current, slows an operating speed of the circuit. Additionally, the CMOS process results in a limited output voltage and load drive capability for a device that is used in the circuit. Further, a wide load drive capability is required to drive a load such as a multi-mode/multi-band (MMMB) RF PA, which has been proposed to minimize a size of a chip to one circuit.
It is difficult for a process and a circuit structure of an analog output amplifier to satisfy all characteristics and requirements, resulting in a trade-off of some extent. Efficiency of a linear amplifier, which uses a fixed supply voltage, decreases at a back-off power range.